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https://github.com/varun-r-mallya/sysprof.git
synced 2026-02-12 16:10:54 +00:00
lib: use stdatomic.h for memory barriers
C11 gives us APIs for fencing logic. Use that instead of a a long, per-architecture, hand curated list of definitions.
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@ -20,7 +20,6 @@ libutil_la_SOURCES = \
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util/elfparser.h \
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util/elfparser.h \
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util/stackstash.c \
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util/stackstash.c \
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util/stackstash.h \
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util/stackstash.h \
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util/util.h \
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$(NULL)
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$(NULL)
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libutil_la_CFLAGS = \
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libutil_la_CFLAGS = \
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-I$(srcdir)/util \
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-I$(srcdir)/util \
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@ -41,8 +41,6 @@
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#include "sp-callgraph-view.h"
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#include "sp-callgraph-view.h"
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#include "sp-cell-renderer-percent.h"
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#include "sp-cell-renderer-percent.h"
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#include "util.h"
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typedef struct
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typedef struct
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{
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{
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SpCallgraphProfile *profile;
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SpCallgraphProfile *profile;
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@ -42,6 +42,7 @@
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#include <errno.h>
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#include <errno.h>
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#include <gio/gio.h>
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#include <gio/gio.h>
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#include <gio/gunixfdlist.h>
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#include <gio/gunixfdlist.h>
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#include <stdatomic.h>
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#include <string.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <sys/mman.h>
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@ -54,8 +55,6 @@
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#include "sp-perf-counter.h"
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#include "sp-perf-counter.h"
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#include "util.h"
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/*
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/*
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* Number of pages to map for the ring buffer. We map one additional buffer
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* Number of pages to map for the ring buffer. We map one additional buffer
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* at the beginning for header information to communicate with perf.
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* at the beginning for header information to communicate with perf.
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@ -227,7 +226,7 @@ sp_perf_counter_flush (SpPerfCounter *self,
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tail = info->tail;
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tail = info->tail;
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head = info->map->data_head;
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head = info->map->data_head;
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read_barrier ();
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atomic_thread_fence (memory_order_acquire);
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if (head < tail)
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if (head < tail)
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tail = head;
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tail = head;
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@ -37,7 +37,6 @@
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#include "binfile.h"
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#include "binfile.h"
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#include "elfparser.h"
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#include "elfparser.h"
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#include "util.h"
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struct bin_file_t
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struct bin_file_t
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{
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{
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@ -1,44 +0,0 @@
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#ifndef SP_UTIL_H
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#define SP_UTIL_H
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#ifdef __i386__
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#define read_barrier() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#endif
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#ifdef __x86_64__
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#define read_barrier() asm volatile("lfence" ::: "memory")
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#endif
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#ifdef __powerpc__
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#define read_barrier() asm volatile ("sync" ::: "memory")
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#endif
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#ifdef __s390__
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#define read_barrier() asm volatile("bcr 15,0" ::: "memory")
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#endif
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#ifdef __sh__
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#if defined(__SH4A__) || defined(__SH5__)
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# define read_barrier() asm volatile("synco" ::: "memory")
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#else
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# define read_barrier() asm volatile("" ::: "memory")
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#endif
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#endif
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#ifdef __hppa__
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#define read_barrier() asm volatile("" ::: "memory")
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#endif
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#ifdef __arm__
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#define read_barrier() asm volatile("dsb" ::: "memory")
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#endif
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/*
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* Fallback to a full memory barrier if the architecture is not yet
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* supported with a lighter read barrier.
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*/
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#ifndef read_barrier
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#define read_barrier() __sync_synchronize()
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#endif
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#endif /* SP_UTIL_H */
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